Saturday, April 21, 2007

Hold time and Setup Time

One thing that bewildered me as an IC Designer is that I can't really figure out what is setup and hold time significance and its impact using timing diagram. I hope this post will clear up everything for future junior IC Designer.

Setup and Hold time is timing constraint for register. Setup time relates to speed of the system. Hold time relates to functionality of the of the system. There's two types of setup and hold. First is setup and hold for pin to register. Second type is setup and hold for register to register.

For pin to register setup and hold time, you must send the data first and then only send the clock to clock the data at the register. This is called setup time. If the data sheet said it needs minimum 8ns setup time, make sure you delay the clock for 8ns compare to data. And the data needs to be hold long enough after the clock. This is called hold time.

For register to register setup and hold time, one thing we need to keep in mind is data is clocked by the first clock for the first register. Then this data output from the first register must be clocked by the second clock for the second register. To summarize, data go through 2 register needs two clock cycle. To make sure this happen, data must be slow down compare to clock. If you have data path faster than clock path, means, the current clock (first clock cycle) can still clock the output from first register that is clocked by the first clock. This is called hold time.

Conclusion is, pin to register, Setup time is more important. As for register to register, hold time is more important. This is according to me. I'll talk more about this in the next post with diagram and stuff. :)

Please read the follow up:
Hold time and Setup time (2)
Setup and speed of circuit